Information is held in a non-volatile semiconductor memory transistor by storing a charge in a layer of for example polycrystalline silicon sandwiched between silicon dioxide or silicon nitride sandwiched between silicon dioxide on a semiconductor active region in which a channel is to be formed (hereinafter referred to as a “charge storage layer”).
Realization of a sufficient charge holding time becomes possible by making the silicon dioxide film on the semiconductor active region side (bottom dielectric film) thick. In general, a bottom dielectric film in an FG (floating gate) type using polycrystalline silicon as the charge storage layer must be formed to at least about 10 nm, while a bottom dielectric film in a MONOS (metal oxide nitride oxide semiconductor) type using a silicon nitride film as the charge storage layer must be formed to at least about 3 nm. Further, the silicon oxide film on the charge storage layer (top dielectric film) needs a thickness great enough to prevent movement of a charge with the gate electrode stacked thereon.
At an input of charge to this charge storage layer, voltage is supplied to the gate electrode to generate a high electric field in the bottom dielectric film. In general, the charge is conducted in the bottom dielectric film and is injected into the charge storage layer by an electric conduction mechanism determined in accordance with the intensity of this electric field and the bottom dielectric film thickness, that is, a direct tunneling phenomenon or FN (Fowler-Nordheim) tunneling phenomenon. The charge injection using this tunneling phenomenon will be referred to as “tunnel injection” below. Tunnel injection is sometimes carried out from the entire surface of the channel or carried out from one or both of the source and drain.
As another representative charge injection method, there is a method of energizing the charge until a barrier height of the bottom dielectric film is exceeded in the semiconductor active region. In the most general method referred to as a “channel hot carrier (hot electron or hot hole) injection”, voltage is supplied between the source region and the drain region provided in the semiconductor active region on both sides of the gate electrode and voltage is supplied to the gate electrode to form an inverse layer (channel) between the source and the drain so as to accelerate the carriers supplied from the source side and traveling in the channel. The carriers become hot carriers at the drain end side by receiving energy from the electric field applied in the channel direction. Part thereof exceeds the energy barrier height between the bottom dielectric film and the silicon and is injected into the above charge storage layer.
Note that a method of supplying a high voltage to the source region or drain region and the gate electrode without forming a channel, forcibly inverting a surface portion of that region to generate band-band tunneling, and injecting the high energy charge generated by this into the charge storage layer is also known.
Output of the charge from the charge storage layer can be realized by applying an electric field in an inverse direction to that at the time of the tunnel injection and forcibly draining the charge from the charge storage layer to the channel side. Further, a similar effect to that by draining the charge is obtained also by injecting a charge having an inverse polarity to that of the stored charge into the charge storage layer.
When detecting the presence of a charge or the amount of stored charge in such a charge storage layer, the voltage between the source and drain and the gate voltage are set to predetermined values. When optimizing the bias conditions at this time, a conduction rate of the channel conspicuously changes in accordance with presence of a charge or the amount of stored charge. Accordingly, the presence of a charge or the amount of stored charge in the charge storage layer is effectively converted to an amount of channel current or a change of drain voltage. Detection of the stored information becomes possible by this.
In a conventional MONOS type memory transistor having a charge storage layer made of a single silicon nitride film or silicon oxynitride film, there was a problem that the thickness of the bottom dielectric film could not be reduced to 3 nm or less since the required charge holding time was ensured. Further, the thickness of the dielectric film between the semiconductor active region and the gate electrode can not be reduced by a silicon dioxide conversion, so there was the problem that no progress was made in reduction of the voltage or an increase of the speed.
On the other hand, in a conventional MONOS type memory transistor, the top dielectric film between the gate electrode and the charge storage layer (silicon nitride film) was made of a silicon dioxide film. Hydrogen atoms are apt to be diffused in the silicon dioxide film, so the hydrogen contained in the silicon nitride is diffused in the silicon dioxide and escapes from the silicon nitride film immediately after the fabrication of the element. The amount of the hydrogen bonded with silicon in the silicon nitride film has a positive correlation with the amount of the charge traps. For this reason, when hydrogen escapes from the silicon nitride film immediately after the fabrication of the element, the amount of the charge traps existing in the silicon nitride is decreased. Consequently there was a possibility of occurrence of aging of the device characteristics.